PIC18F4580 18F4580 DIP40 I/P 40 MHz FLASH 32kB (có CANBUS)

PIC18F4580 DIP là một chíp vi điều khiển được sản xuất bời hãng Microchip thuộc họ Pic. 

Pic18F4580 là một bộ vi điều khiển 8 bit dựa trên kiến trúc RISC bộ nhớ chương trình 32KB ISP flash có thể ghi xóa hàng nghìn lần.

THÔNG SỐ KỸ THUẬT:

1. Special Microcontroller Features:

C Compiler Optimized Architecture with Optional Extended Instruction Set 

• 100,000 Erase/Write Cycle Enhanced Flash Program Memory Typical 

• 1,000,000 Erase/Write Cycle Data EEPROM Memory Typical 

• Flash/Data EEPROM Retention: > 40 Years 

• Self-Programmable under Software Control 

• Priority Levels for Interrupts • 8 x 8 Single-Cycle Hardware Multiplier 

• Extended Watchdog Timer (WDT): 

           - Programmable period from 41 ms to 131s 

• Single-Supply 5V In-Circuit Serial Programming™ (ICSP™) via Two Pins 

• In-Circuit Debug (ICD) via Two Pins 

• Wide Operating Voltage Range: 2.0V to 5.5V

2. Peripheral Highlights: 

• High-Current Sink/Source 25 mA/25 mA 

• Three External Interrupts 

• One Capture/Compare/PWM (CCP) module 

• Enhanced Capture/Compare/PWM (ECCP) module (40/44-pin devices only): 

         - One, two or four PWM outputs 

         - Selectable polarity 

         - Programmable dead time 

         - Auto-shutdown and auto-restart 

• Master Synchronous Serial Port (MSSP) module Supporting 3-Wire SPI (all 4 modes) and I2C™ Master and Slave modes 

• Enhanced Addressable USART module 

                 - Supports RS-485, RS-232 and LIN 1.3 

                 - RS-232 operation using internal oscillator block (no external crystal required) 

                 - Auto-wake-up on Start bit 

                 - Auto-Baud Detect 

• 10-Bit, up to 11-Channel Analog-to-Digital Converter (A/D) module, up to 100 ksps: 

                 - Auto-acquisition capability 

                 - Conversion available during Sleep 

• Dual Analog Comparators with Input Multiplexing

3. ECAN Technology Module Features:

• Message Bit Rates up to 1 Mbps 

• Conforms to CAN 2.0B Active Specification 

• Fully Backward Compatible with PIC18XXX8 CAN modules 

• Three Modes of Operation: - Legacy, Enhanced Legacy, FIFO 

• Three Dedicated Transmit Buffers with Prioritization 

• Two Dedicated Receive Buffers • Six Programmable Receive/Transmit Buffers 

• Three Full 29-Bit Acceptance Masks 

• 16 Full 29-Bit Acceptance Filters w/Dynamic Association 

• DeviceNet™ Data Byte Filter Support 

• Automatic Remote Frame Handling 

• Advanced Error Management Features